Publications

Below is a list of my publications and links to download them. Copyright and all rights therein are retained by authors or by other copyright holders.



International Journal Papers



  1. K.S Reddy, K. Vipin, “OpenNoC: An Open-Source NoC infrastructure for FPGA-based Hardware Acceleration", IEEE Embedded system letters (ESL), 2019.

  2. K. Vipin, “AsyncBTree: Revisiting Binary Tree Topology for Efficient FPGA-Based NoC Implementation”, International Journal of Reconfigurable Computing (IJRC), Hindawi Publications, Volume 2019, Article ID 7239858

  3. K. Vipin and S.A. Fahmy, "FPGA Dynamic and Partial Reconfiguration: A Survey of Architectures, Methods, and Applications", ACM Computing Surveys (CSUR), 2018.

  4. M. Asiatici, N. George, K. Vipin, S.A. Fahmy, P. Ienne, "Virtualized Execution Runtime for FPGA Accelerators in the Cloud", IEEE Access, 2017.

  5. K. Vipin and S.A. Fahmy, "ZyCAP: Efficient Partial Reconfiguration Management on the Xilinx Zynq", IEEE Embedded System Letters (ESL), 2014.

International Conference Papers



  1. X Li, K Vipin, DL Maskell, SA Fahmy, AK Jain, "High Throughput Accelerator Interface Framework for a Linear Time-Multiplexed FPGA Overlay", in Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), 2020

  2. A Zhanbolatov, K Vipin, A Dadlani, D Fedorov "StocNoC: Accelerating Stochastic Models Through Reconfigurable Network on Chip Architectures", in Proceedings of International Symposium on Applied Reconfigurable Computing, 2020

  3. K Vipin "ZyNet: Automating Deep Neural Network Implementation on Low-Cost Reconfigurable Edge Computing Platforms", in Proceedings of International Conference on Field-Programmable Technology (ICFPT), 2019

  4. AP James, B Choubey, K Vipin "Reconfigurable Threshold Logic Networks in FPGA for Moving Object Detection", in Proceedings of IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), 2019

  5. M. Bekbolat, S. Kairatova, A. Shymyrbay and K. Vipin, “HBLast: An open-source FPGA library for DNA sequencing acceleration”, in Proceedings of IEEE International Parallel and Distributed Processing System (IPDPS), Rio De Janeiro, Brazil, May 2019

  6. K Vipin, Y. Akhmetov, S. Myrzakhme and A. P James, “FAPNN : An FPGA based Approximate Probabilistic Neural Network Library”, in Proceedings of IEEE International Conference on Computing and Network Communications, Astana, Kazakhstan, August 2018

  7. K Vipin “CANNoC: An Open Source NoC Architecture for ECU Consolidation”, in Proceedings of IEEE International Midwest Symposium on Circuits and Systems (IEEE MWSCAS), Windsor, Canada, August 2018

  8. I Dolzhikova, K Salama, K Vipin and A James, “Memristor-based Synaptic Sampling Machines”, in Proceedings of IEEE International Conference on Nanotechnology, Cork (IEEE NANO), Ireland, July 2018

  9. A P James, O Krestinskaya, K Vipin, “Memristive Probabilistic Neural Network for Biometric Recognition”, in Proceedings of international conference on Memristive materials, devices and systems , Beijing, China, July 2018

  10. K. Vipin, J. Gray, N. Kapre, "Enabling partial reconfiguration and low latency routing using segmented FPGA NoCs” in Proceedings of the Field Programmable Logic and Applications (FPL), Ghent, Belgium, September 2017.

  11. M. Asiatici, N. George, K. Vipin, S.A. Fahmy, P. Ienne, "Designing a virtual runtime for FPGA accelerators in the cloud” in Proceedings of the Field Programmable Logic and Applications (FPL), Lausanne, Switzerland, September 2016.

  12. M. Vesper, D. Koch, K. Vipin, S.A. Fahmy, "JetStream: An open-source high-performance PCI Express 3 streaming library for FPGA-to-Host and FPGA-to-FPGA communication” in Proceedings of the Field Programmable Logic and Applications (FPL), Lausanne, Switzerland, September 2016.

  13. A Kulkarni, K. Vipin, D. Stroobandt, "MiCAP: A custom Reconfiguration Controller for Dynamic Circuit Specialization” in Proceedings of the IEEE International Conference on Reconfigurable Computing and FPGAs (ReConFig), Mayan Riviera, Mexico, December 2015.

  14. S. A. Fahmy, K. Vipin, and S. Shreejith, "Virtualized FPGA Accelerators for Efficient Cloud Computing” in Proceedings of the IEEE International Conference on Cloud Computing Technology and Science (CloudCom), Vancouver, Canada, November 2015.

  15. S. Shreejith, B. Banarjee, K. Vipin, S.A. Fahmy, “Dynamic Cognitive Radios on the Xilinx Zynq Hybrid FPGA”,in Proceedings of International Conference on Cognitive Radio Oriented Wireless Networks (CrownCom), Doha, Qatar, 2015.

  16. K. Vipin, S. Shreejith,. S.A Fahmy, A. Easwaran, "Mapping Time-Critical Safety-Critical Cyber Physical Systems to Hybrid FPGAs",in Proceedings of IEEE International Conference on Cyber-Physical Systems, Networks, and Applications (CPSNA), Hong Kong, China, 2014

  17. K. Vipin and S.A. Fahmy, "DyRACT: A partial reconfiguration enabled accelerator and test platform",in Proceedings of International Conference on Field Programmable Logic and Applications (FPL), Munich, Germany, 2014.

  18. K. Vipin and S.A. Fahmy, "Automated Partial Reconfiguration Design for Adaptive Systems with CoPR for Zynq", in Proceedings of the International Conference on Field Programmable Custom Computing Machines (FCCM), Boston, Massachusetts, May 2014.

  19. K. Vipin, S. Shreejith, D. Gunasekara, S.A. Fahmy and N. Kapre, "System-Level FPGA Device Driver with High-Level Synthesis Support", in Proceedings of the International Conference on Field Programmable Technology (FPT) , Kyoto, Japan, December 2013, pp. 128-135.

  20. K. Vipin and S.A. Fahmy, "Automated Partitioning for Partial Reconfiguration Design of Adaptive Systems”, in Reconfigurable Architecture Workshop (RAW), Boston, USA, May 2013, pp. 172–181.

  21. K. Vipin and S.A. Fahmy, “A High Speed Open Source Controller for FPGA Partial Reconfiguration” , in Proceedings of the International Conference on Field Programmable Technology (FPT), Seoul, Korea, December 2012, pp. 61–66.

  22. K. Vipin and S.A. Fahmy, “Architecture-Aware Reconfiguration-Centric Floorplanning for Partial Reconfiguration”, in Reconfigurable Computing: Architectures, Tools and Applications – Proceedings of the International Symposium on Applied Reconfigurable Computing (ARC), Hong Kong, March 2012, pp. 13–25.

  23. K. Vipin and S.A. Fahmy, “Efficient Region Allocation for Adaptive Partial Reconfiguration”, in Proceedings of the International Conference on Field Programmable Technology (FPT), New Delhi, India, December 2011.

Posters in International Conferences



  1. K. Vipin and S.A. Fahmy, “An Approach to a Fully Automated Partial Reconfiguration Design Flow”, in Proceedings of the International Conference on Field Programmable Custom Computing Machines (FCCM), Seattle, WA, April 2013, pp. 231.

  2. S.Shreejith, K. Vipin and S.A. Fahmy, "An Approach for Redundancy in FlexRay Networks Using FPGA Partial Reconfiguration”, in Proceedings of the Design, Automation and Test in Europe (DATE), Grenoble, France, March 2013, pp. 721–724.

  3. K. Vipin and S.A. Fahmy, “Enabling High Level Design of Adaptive Systems with Partial Reconfiguration”, PhD Forum Paper in Proceedings of the International Conference on Field Programmable Technology (FPT), New Delhi, India, December 2011.

  4. K. Vipin and S.A. Fahmy, “A Threat Based Connect6 Implementation on FPGA”, Design Competition Paper in Proceedings of the International Conference on Field Programmable Technology (FPT), New Delhi, India, December 2011.

Ph.D Thesis